Introduce Maxwell 3D shader state

Simple state holder that hashes the stored shader and reads it into a buffer
This commit is contained in:
Billy Laws
2022-09-09 22:46:43 +01:00
parent 6865f0bdaf
commit 405d26fc22
5 changed files with 76 additions and 15 deletions

View File

@ -12,6 +12,7 @@
#include <gpu.h>
#include <vulkan/vulkan_core.h>
#include "pipeline_state.h"
#include "shader_state.h"
#include "soc/gm20b/engines/maxwell/types.h"
namespace skyline::gpu::interconnect::maxwell3d {
@ -753,6 +754,18 @@ namespace skyline::gpu::interconnect::maxwell3d {
}
}
/* Global Shader Config State */
void GlobalShaderConfigState::EngineRegisters::DirtyBind(DirtyManager &manager, dirty::Handle handle) const {
manager.Bind(handle, postVtgShaderAttributeSkipMask, bindlessTexture);
}
GlobalShaderConfigState::GlobalShaderConfigState(const EngineRegisters &engine) : engine{engine} {}
void GlobalShaderConfigState::Update(PackedPipelineState &packedState) {
packedState.postVtgShaderAttributeSkipMask = engine.postVtgShaderAttributeSkipMask;
packedState.bindlessTextureConstantBufferSlotSelect = engine.bindlessTexture.constantBufferSlotSelect;
}
/* Pipeline State */
void PipelineState::EngineRegisters::DirtyBind(DirtyManager &manager, dirty::Handle handle) const {
auto bindFunc{[&](auto &regs) { regs.DirtyBind(manager, handle); }};
@ -764,6 +777,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
PipelineState::PipelineState(dirty::Handle dirtyHandle, DirtyManager &manager, const EngineRegisters &engine)
: engine{manager, dirtyHandle, engine},
shaders{util::MergeInto<dirty::ManualDirtyState<IndividualShaderState>, engine::PipelineCount>(manager, engine.shadersRegisters, util::IncrementingT<u8>{})},
colorRenderTargets{util::MergeInto<dirty::ManualDirtyState<ColorRenderTargetState>, engine::ColorTargetCount>(manager, engine.colorRenderTargetsRegisters, util::IncrementingT<size_t>{})},
depthRenderTarget{manager, engine.depthRenderTargetRegisters},
vertexInput{manager, engine.vertexInputRegisters},
@ -771,7 +785,8 @@ namespace skyline::gpu::interconnect::maxwell3d {
rasterization{manager, engine.rasterizationRegisters},
depthStencil{manager, engine.depthStencilRegisters},
colorBlend{manager, engine.colorBlendRegisters},
directState{engine.inputAssemblyRegisters} {}
directState{engine.inputAssemblyRegisters},
globalShaderConfig{engine.globalShaderConfigRegisters} {}
void PipelineState::Flush(InterconnectContext &ctx, StateUpdateBuilder &builder) {
boost::container::static_vector<TextureView *, engine::ColorTargetCount> colorAttachments;
@ -790,6 +805,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
}; */
depthStencil.Update(packedState);
colorBlend.Update(packedState);
globalShaderConfig.Update(packedState);
constexpr std::array<vk::DynamicState, 9> dynamicStates{
vk::DynamicState::eViewport,

View File

@ -6,7 +6,7 @@
#include <boost/container/static_vector.hpp>
#include <gpu/texture/texture.h>
#include "common.h"
#include "soc/gm20b/engines/maxwell/types.h"
#include "shader_state.h"
namespace skyline::gpu::interconnect::maxwell3d {
/**
@ -47,11 +47,13 @@ namespace skyline::gpu::interconnect::maxwell3d {
bool stencilTestEnable : 1;
bool logicOpEnable : 1;
vk::LogicOp logicOp : 4; //!< Use {Set, Get}LogicOp
u8 bindlessTextureConstantBufferSlotSelect : 5;
};
u32 patchSize;
std::array<engine::VertexAttribute, engine::VertexAttributeCount> vertexAttributes;
std::array<u8, engine::ColorTargetCount> colorRenderTargetFormats; //!< Use {Set, Get}ColorRenderTargetFormat
std::array<u32, 8> postVtgShaderAttributeSkipMask;
struct VertexBinding {
u16 stride : 12;
@ -287,12 +289,31 @@ namespace skyline::gpu::interconnect::maxwell3d {
void Flush(PackedPipelineState &packedState);
};
class GlobalShaderConfigState {
public:
struct EngineRegisters {
const std::array<u32, 8> &postVtgShaderAttributeSkipMask;
const engine::BindlessTexture &bindlessTexture;
void DirtyBind(DirtyManager &manager, dirty::Handle handle) const;
};
private:
EngineRegisters engine;
public:
GlobalShaderConfigState(const EngineRegisters &engine);
void Update(PackedPipelineState &packedState);
};
/**
* @brief Holds all GPU state for a pipeline, any changes to this will result in a pipeline cache lookup
*/
class PipelineState : dirty::ManualDirty {
public:
struct EngineRegisters {
std::array<IndividualShaderState::EngineRegisters, engine::PipelineCount> shadersRegisters;
std::array<ColorRenderTargetState::EngineRegisters, engine::ColorTargetCount> colorRenderTargetsRegisters;
DepthRenderTargetState::EngineRegisters depthRenderTargetRegisters;
VertexInputState::EngineRegisters vertexInputRegisters;
@ -301,6 +322,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
RasterizationState::EngineRegisters rasterizationRegisters;
DepthStencilState::EngineRegisters depthStencilRegisters;
ColorBlendState::EngineRegisters colorBlendRegisters;
GlobalShaderConfigState::EngineRegisters globalShaderConfigRegisters;
void DirtyBind(DirtyManager &manager, dirty::Handle handle) const;
};
@ -310,6 +332,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
dirty::BoundSubresource<EngineRegisters> engine;
std::array<dirty::ManualDirtyState<IndividualShaderState>, engine::PipelineCount> shaders;
std::array<dirty::ManualDirtyState<ColorRenderTargetState>, engine::ColorTargetCount> colorRenderTargets;
dirty::ManualDirtyState<DepthRenderTargetState> depthRenderTarget;
dirty::ManualDirtyState<VertexInputState> vertexInput;
@ -317,7 +340,7 @@ namespace skyline::gpu::interconnect::maxwell3d {
dirty::ManualDirtyState<RasterizationState> rasterization;
dirty::ManualDirtyState<DepthStencilState> depthStencil;
dirty::ManualDirtyState<ColorBlendState> colorBlend;
GlobalShaderConfigState globalShaderConfig;
public:
DirectPipelineState directState;