Implement usage based implicit renderpass barrier generation

Full pipeline barriers between every RP can be extremely expensive on HW, by analysing the inputs and outputs of a draw it's possible to construct a much more optimal barrier that only syncs what is neccessary.
This commit is contained in:
Billy Laws
2023-02-12 21:14:05 +00:00
parent 7a759326b3
commit 99bf7dbb36
19 changed files with 237 additions and 64 deletions

View File

@ -633,6 +633,13 @@ namespace skyline::gpu {
return mirror;
}
void Buffer::PopulateReadBarrier(vk::PipelineStageFlagBits dstStage, vk::PipelineStageFlags &srcStageMask, vk::PipelineStageFlags &dstStageMask) {
if (currentExecutionGpuDirty) {
srcStageMask |= vk::PipelineStageFlagBits::eAllCommands;
dstStageMask |= dstStage;
}
}
void Buffer::lock() {
mutex.lock();
accumulatedCpuLockCounter++;